The present invention relates to Fractional-N frequency synthesis, and in particular to techniques for generating precise timing signals.
Fractional-N frequency synthesis is a synthesis technique commonly employed today. The technique has been extensively described in the literature, for example, "The Digiphase Synthesizer," by Garry C. Gillette, a paper presented in 1969 at the twenty-third Annual Frequency Control Symposium; "Low-Noise Frequency Synthesizers Using Fractional N Phase-Locked Loops," Ulrich Rhode, RF Design, January/February 1981, pp. 20-34; "A Synthesized Signal Source with Functional Generator Capability," Dan D. Danielson and Stanley E. Froseth, Hewlett-Packard Journal, January, 1979, pp. 18-26; "Frequency Synthesis: Techniques and Applications," J. Gorski-Popiel, IEEE Press, 1975; and "Frequency Synthesis by Phase Lock," William F. Egan, John Wiley & Sons, 1981.
As is well known, Fractional-N synthesis utilizes a phase lock loop (PLL) with a variable-ratio programmable divider whose average division ratio is the sum of an integer and a fraction of an integer. A reference oscillator circuit provides a reference frequency F.sub.ref to a phase detector and comparator. The output of a voltage controlled oscillator (VCO) is coupled through the variable ratio divider circuit to the phase detector, and the error signal from the phase detector controls the VCO. A divider circuit which has a fractional component F is required to lock the VCO to a fractional multiple of the reference frequency. The variable-ratio divider is adapted to divide by N.sub.1 for a number of cycles of the VCO signal and then momentarily divides by N.sub.1 -1 or N.sub.1 +1. The division by N.sub.1 -1 is required at the instant the phase of the VCO signal differs by 360.degree. from the phase of the signal under locked conditions. Setting the divider to divide by N.sub.1 -1 is equivalent to advancing the output of the variable-ratio divider by one VCO cycle.
A phase interpolator is typically used to generate the signal which controls the variable-ratio divider circuit. The interpolator generates a carry or overflow signal at exactly the instant at which the division ratio is changed. One way of implementing the division-ratio change is to employ a "pulse-swallower" circuit which removes one VCO pulse.
Fractional-N synthesis results in the VCO signal phase changing periodically, with the period determined by the magnitude of F, the fractional component of N. The phase comparator will generate a spurious beat note whose rate is equal to the rate of N.sub.1 -1 division. The beat note is substantially cancelled by synthesis of an analog signal with a waveform and rate equivalent to the spurious beat note. This signal may be inverted and summed with the phase detector output in a sum circuit to drive the VCO, typically through a loop filter.
The extent to which the spurious beat signal is cancelled depends on the magnitude of error made in generating the cancellation signal. The error in turn generates FM spurious signals, i.e., sidebands or spurs.
A desirable feature of programmable synthesizers is the ability to rapidly switch from one programmed frequency to another. To obtain high speed frequency switching, it is necessary to employ a high reference frequency. Because the period of the high reference frequency is shorter, this requires that the correction to the phase detector signal or ramp also must be performed within a shorter period. If the phase detector ramp is not cancelled, the resultant signal will have a spectral content including very appreciable sidebands or spurs.
Prior art phase interpolators have employed either highly accurate D/A convertors to generate an analog signal similar in shape and identical in frequency and phase with the spurious beat note, or a current integration scheme, wherein the performance is limited by the current gating waveform time integrity when the reference frequency is very high, greater than 1 MHz. Both techniques have been insufficient to support Fractional-N synthesis with high reference signal frequencies.
The most accurate analog phase interpolation methods integrate a precision current for a period of time inversely proportional to the VCO frequency. This is done each reference period and effectively presets the linear phase detector ramp voltate in anticipation of the phase detector beat note caused by pulse swallowing. At high reference frequencies, generation of an accurate gating signal which is inversely proportional to the VCO frequency is difficult because of different gate delays and different positive and negative slew rates.
The difficulty may be appreciated by considering a specific example. The amplitude of the FM spurs is 20 log of one half the peak phase deviation. For an analog phase interpolator employing a precision current source to develop the correction signal, the required accuracy in the correction current is 0.1% to obtain a maximum spur level 60 db below the amplitude at the signal frequency. The correction voltage V.sub.c follows the relationship V.sub.c =IC .DELTA.t, where .DELTA.t is the integration time during which the precision current I charges an integration capacitor C. A typical integration time may be 200 nanoseconds. Thus, the integration time must be accurate at least to within 200 picoseconds to obtain a maximum spur level of 60 db below the synthesized signal. The difficulty in achieving this precision in gating time from a flip-flop circuit may be appreciated by recognizing the smallest available differences in the rise and fall times of a flip-flop (11C06 ECL) is 0.5 nanoseconds. This difference alone is more than twice the available time error allowable.
It is an object of the present invention to provide a frequency synthesizer employing Fractional-N synthesis with reference signal frequencies well into the Megahertz range, and having improved spurious performance.
Another object of the invention is to provide a frequency synthesizer having small channel spacing and high switching speeds from one channel to another.
It is a further object of the invention to provide a gating waveform with a very high degree of time integrity.